general description features (v gs = 10v) (v gs = 10v) (v gs = 4.5v) 100% uis tested! 100% rg tested! - rohs compliant - halogen free symbol v ds v gs i dm i ar e ar t j , t stg symbol typ max 15 20 41 50 r jc 2.1 3 i d = 50a r ds(on) < 5.2m ? t c =25c 2.5 25 t c =100c 50 100 pulsed drain current c continuous drain current g junction and storage temperature range -55 to 175 c thermal characteristics units maximum junction-to-ambient a t 10s c/w parameter r ja v v 20 gate-source voltage drain-source voltage 25 AOI472A n-channel enhancement mode field effect transistor maximum units parameter absolute maximum ratings t a =25c unless otherwise noted the AOI472A is fabricated with sdmos tm trench technology that combines excellent r ds(on) with low gate charge.the result is outstanding efficiency with controlled switching behavior. this universal technology is well suited for pwm, load switching and general purpose applications. r ds(on) < 9.5m ? v ds (v) =25v repetitive avalanche energy l=50uh c mj avalanche current c 13 continuous drain current 63 17 a a t a =25c i dsm a t a =70c i d 50 39 t c =25c t c =100c power dissipation b p d w power dissipation a p dsm w t a =70c 50 1.6 t a =25c maximum junction-to-case steady-state c/w steady-state c/w maximum junction-to-ambient a d g d s g g d d s s d top view bottom view to-251a ipak alpha & omega semiconductor, ltd. www.aosmd.com
AOI472A symbol min typ max units bv dss 25 v v ds =25v, v gs =0v 10 t j =55c 50 i gss 100 na v gs(th) gate threshold voltage 1.2 2 2.5 v i d(on) 100 a 4.3 5.2 t j =125c 6.2 7.4 8 9.5 m ? ? q g (10v) 25 31 40 nc q g (4.5v) 12 15 20 nc q gs 3.5 4.8 7 nc q gd 6.5 8.9 13 nc t d(on) 8ns t r 10.4 ns t d(off) 29 ns t f 9ns t rr 9.5 12 15 ns q rr 17 21 26 nc repetitive avalanche energy l=50uh c rev0 : dec-08 components in life support devices or systems are not authorized. aos does not assume any liability arising out of such applications or uses of its products. aos reserves the right to improve product design, functions and reliability without notice. body diode reverse recovery charge i f =30a, di/dt=500a/ s maximum body-diode continuous current input capacitance output capacitance turn-on delaytime dynamic parameters turn-on rise time turn-off delaytime v gs =10v, v ds =12.5v, r l =0.42 ? , r gen =3 ? gate resistance v gs =0v, v ds =0v, f=1mhz turn-off fall time total gate charge v gs =10v, v ds =12.5v, i d =30a gate source charge gate drain charge total gate charge m ? i s =1a,v gs =0v v ds =5v, i d =30a v gs =4.5v, i d =20a forward transconductance diode forward voltage r ds(on) static drain-source on-resistance i dss a v ds =v gs i d =250 a v ds =0v, v gs = 20v zero gate voltage drain current gate-body leakage current electrical characteristics (t j =25c unless otherwise noted) static parameters parameter conditions body diode reverse recovery time drain-source breakdown voltage on state drain current i d =250 a, v gs =0v v gs =10v, v ds =5v v gs =10v, i d =30a reverse transfer capacitance i f =30a, di/dt=500a/ s v gs =0v, v ds =12.5v, f=1mhz switching parameters a. the value of r ja is measured with the device mounted on 1in 2 fr-4 board with 2oz. copper, in a still air environment with t a =25c. the power dissipation p dsm is based on r ja and the maximum allowed junction temperature of 150c. the value in any given application depends on the user's specific board design, and the maximum temperature of 175c may be used if the pcb allows it. b. the power dissipation p d is based on t j(max) =175c, using junction-to-case thermal resistance, and is more useful in setting the upper dissipation limit for cases where additional heatsinking is used. c. repetitive rating, pulse width limited by junction temperature t j(max) =175c. ratings are based on low frequency and duty cycles to keep initial t j =25c. d. the r ja is the sum of the thermal impedence from junction to case r jc and case to ambient. e. the static characteristics in figures 1 to 6 are obtained using <300 s pulses, duty cycle 0.5% max. f. these curves are based on the junction-to-case thermal impedence which is measured with the device mounted to a large heatsi nk, assuming a maximum junction temperature of t j(max) =175c. the soa curve provides a single pulse rating. g. the maximum current rating is limited by bond-wires. h. these tests are performed with the device mounted on 1 in 2 fr-4 board with 2oz. copper, in a still air environment with t a =25c. alpha & omega semiconductor, ltd. www.aosmd.com
AOI472A typical electrical and thermal characteristic s 17 5 2 10 0 18 40 0 20 40 60 80 012345 v gs (volts) figure 2: transfer characteristics (note e) i d (a) 0 2 4 6 8 10 12 0 5 10 15 20 25 30 i d (a) figure 3: on-resistance vs. drain current and gate voltage (note e) r ds(on) (m ? ) 1.0e-05 1.0e-04 1.0e-03 1.0e-02 1.0e-01 1.0e+00 1.0e+01 1.0e+02 0.0 0.2 0.4 0.6 0.8 1.0 1.2 v sd (volts) figure 6: body-diode characteristics (note e) i s (a) 25c 125c 0.8 1 1.2 1.4 1.6 1.8 0 25 50 75 100 125 150 175 200 temperature (c) figure 4: on-resistance vs. junction temperature (note e) normalized on-resistance v gs =4.5v i d =20a v gs =10v i d =30a 0 5 10 15 20 246810 v gs (volts) figure 5: on-resistance vs. gate-source voltage (note e) r ds(on) (m ? ) 25c 125c v ds =5v v gs =4.5v v gs =10v i d =30a 25c 125c 0 20 40 60 80 100 012345 v ds (volts) fig 1: on-region characteristics (note e) i d (a) v gs =3.5v 4v 7v 10v 4.5v 5v alpha & omega semiconductor, ltd. www.aosmd.com
AOI472A typical electrical and thermal characteristic s 17 5 2 10 0 18 40 0 2 4 6 8 10 0 5 10 15 20 25 30 35 q g (nc) figure 7: gate-charge characteristics v gs (volts) 0 400 800 1200 1600 2000 2400 2800 0 5 10 15 20 25 v ds (volts) figure 8: capacitance characteristics capacitance (pf) c iss 0 40 80 120 160 200 0.0001 0.001 0.01 0.1 1 10 pulse width (s) figure 10: single pulse power rating junction-to- case (note f) power (w) 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 pulse width (s) figure 11: normalized maximum transient thermal impedance (note f) z jc normalized transient thermal resistance c oss c r ss v ds =12.5v i d =30a single pulse d=t on /t t j,pk =t c +p dm .z jc .r jc t o n t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse t j(max) =175c t c =25c 10 v ds (volts) i d (amps) figure 9: maximum forward biased safe operating area (note f) 10 jc =3c/w alpha & omega semiconductor, ltd. www.aosmd.com
AOI472A typical electrical and thermal characteristic s 17 5 2 10 0 18 40 0.001 0.01 0.1 1 10 0.00001 0.0001 0.001 0.01 0.1 1 10 100 1000 pulse width (s) figure 16: normalized maximum transient thermal impedance (note h) z ja normalized transient thermal resistance single pulse d=t on /t t j,pk =t a +p dm .z ja .r ja t o n t p d in descending order d=0.5, 0.3, 0.1, 0.05, 0.02, 0.01, single pulse 0 20 40 60 80 0.000001 0.00001 0.0001 0.001 time in avalanche, t a (s) figure 12: single pulse avalanche capability (note c) i ar (a) peak avalanche current 0 10 20 30 40 50 60 0 25 50 75 100 125 150 175 t case (c) figure 13: power de-rating (note f) power dissipation (w) 0 10 20 30 40 50 60 0 25 50 75 100 125 150 175 t case (c) figure 14: current de-rating (note f) current rating i d (a) t a =25c 1 10 100 1000 10000 0.00001 0.001 0.1 10 1000 pulse width (s) figure 15: single pulse power rating junction-to- ambient (note h) power (w) t a =25c t a =150c t a =100c t a =125c r ja =50c/w alpha & omega semiconductor, ltd. www.aosmd.com
AOI472A typical electrical and thermal characteristics 0 5 10 15 20 25 30 0 5 10 15 20 25 30 i b (a) figure 17: diode reverse recovery charge and peak current vs. conduction current q rr (nc) 0 2 4 6 8 10 12 irm (a) di/dt=700a/us 125oc 125oc 25oc 25oc qrr irm 0 5 10 15 20 25 30 0 100 200 300 400 500 600 700 800 di/dt (a/ s) figure 19: diode reverse recovery charge and peak current vs. di/dt q rr (nc) 0 2 4 6 8 10 irm (a) 125oc 125oc 25oc 25oc is=20a qrr irm 0 2 4 6 8 10 12 14 16 0 5 10 15 20 25 30 i b (a) figure 18: diode reverse recovery time and soft coefficient vs. conduction current trr (ns) 0 0.5 1 1.5 2 2.5 3 s di/dt=700a/us 125oc 125oc 25oc 25oc t rr s 0 5 10 15 20 0 100 200 300 400 500 600 700 800 di/dt (a/ s) figure 20: diode reverse recovery time and soft coefficient vs. di/dt t rr (ns) 0 0.5 1 1.5 2 2.5 s 125oc 25oc 25oc 125o is=20a t rr s alpha & omega semiconductor, ltd. www.aosmd.com
AOI472A - + vdc ig vds dut - + vdc vgs vgs 10v qg qgs qgd charge gate charge test circuit & waveform - + vdc dut vdd vgs vds vgs rl rg vgs vds 10% 90% resistive switching test circuit & waveforms tt r d(on) t on t d(off) t f t off vdd vgs id vgs rg dut - + vdc l vgs vds id vgs bv i unclamped inductive switching (uis) test circuit & waveforms ig vgs - + vdc dut l vds vgs vds isd isd diode recovery test circuit & waveforms vds - vds + i f ar dss 2 e = 1/2 li di/dt i rm rr vdd vdd q = - idt ar ar t rr alpha & omega semiconductor, ltd. www.aosmd.com
|
